Virtual University Forum

CS302 Quiz No.3 CS302 Quiz.3 File 1 CS302 Quiz.3 File 2 CS302 Quiz.3 File 3 CS302 Quiz.3 File 4 CS302 Quiz.3 File 5 CS302 Quiz.3 File 6 Tags: CS302,Quiz,302,CS

CS302 Today Quiz No 3 Question # 1 of 10 ( Start time: 11:29:09 PM )     Total Marks: 1 Bi-stable devices remain in either of their _________ states unless the inputs force the device to switch its state Select correct option:             Ten             Eight             Three             Two Question # 2 of 10 ( Start time: 11:30:10 PM )     Total Marks: 1 In Synchronous systems, the output of all the digital circuits changes when an enable signal is applied instead of the clock signal. Select correct option:             True             False 228          Question # 3 of 10 ( Start time: 11:30:31 PM )     Total Marks: 1 ________ flip-flops are obsolete now. Select correct option:             Edge-triggered             Master-Slave 257             T-Flipflop             D-Flipflop          Question # 4 of 10 ( Start time: 11:31:21 PM )     Total Marks: 1 If a circuit suffers “Clock Skew “ problem, the output of circuit can’t be guarantied. Select correct

The minimum time for which the input signal has to be maintained at the input of flip-flop is called ______ of the flip-flop. Set-up time Hold time 242 Pulse Interval time Pulse Stability time (PST) The glitches due to "Race Condition" can be avoided by using a ___________ Gated flip-flops Pulse triggered flip-flops Positive-Edge triggered flip-flops Negative-Edge triggered flip-flops 267 We have a digital circuit. Different parts of circuit operate at different clock frequencies (4MHZ, 2MHZ and 1MHZ), but we have a single clock source having a fix clock frequency (4MHZ), to supply the required frequency to each part of circuit, we can get help by using ___________ Using S-R Flop-Flop D-flipflop J-K flip-flop T-Flip-Flop Once the state diagram is drawn for any sequential circuit the next step is to draw Transiation table Karnaugh map Next-state table 306 Logic expression A synchronous decade counter will have _______ flip-flops 3, 7, 4, 10

In a 4-bit binary counter, the next state after the terminal count in the DOWN mode is __________ 0000 1111 0001 10000 If S=1 and R=0, then for positive edge triggered flip-flop Q(t+1) = _______ 0 1 invalid Input is invalid In Master-Slave flip-flop setup, the master flip flop operates at ________ Positive half cycle of pulse Negative half cycle of pulse Both Master-Slave operate simultaneously Master-Slave flip-flop does not operate on pulses, rather it is edge triggered. If the S and R inputs of the gated S-R latch are connected together using a ____ gate then there is only a single input to the latch. The input is represented by D instead of S or R (A gated D-Latch) AND OR NOT XOR The minimum time required for the input logic levels to remain stable before the clock transition occurs is known as the _________ Set-up time Hold time Pulse Interval time Pulse Stability time (PST) The 74HC163 is a 4-bit Synchron

Question # 1 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   In Master-Slave flip-flop the Clock signal is connected to Slave flip-flop using ________ gate Select correct option: AND OR NOT NAND Question # 2 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   The ABEL symbol for “OR” operation is 3 Select correct option:  &  !  #  $ Question # 3 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   If a circuit suffers “Clock Skew “ problem, the output of circuit can’t be guarantied. Select correct option: True False Question # 4 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   8-bit parallel data can be converted into serial data by using _____3___ multiplexer Select correct option:  4-to-2  4-to-4  8-to-1  8-to-4 Question # 5 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   The terminal count of a 4-bit binary counter in the UP mode is____________ Select correct option:  1100  0011  1111  0000 Question # 6 of 10 ( Start time: 03:03:

Question # 1 of 10 ( Start time: 03:03:55 PM )  Total Marks: 1   Divide-by-32 counter can be acheived by using Select correct option: Flip-Flop and DIV 10   Flip-Flop and DIV 16   Flip-Flop and DIV 32   DIV 16 and DIV 32 Question # 2 of 10 ( Start time: 03:05:20 PM )  Total Marks: 1   The counter states or the range of numbers of a counter is determined by the formula. (“n” represents the total number of flip-flops) Select correct option: (n raise to power 2)   (n raise to power 2 and then minus 1)   (2 raise to power n) (2 raise to power n and then minus 1) Question # 3 of 10 ( Start time: 03:06:36 PM )  Total Marks: 1   A 4- bit UP/DOWN counter is in DOWN mode and in the 1010 state. on the next clock pulse, to what state does the counter go? Select correct option: 1001   1011   0011   1100 Question # 4 of 10 ( Start time: 03:07:37 PM )  Total Marks: 1   A 4-bit binary UP/DOWN counter is in the binary state zero. the next state in the DOWN mode

Question # 1 of 10 ( Start time: 03:40:29 PM )         Total Marks: 1 Design of state diagram is one of many steps used to design Select correct option: a clock   a truncated counter   an UP/DOWN counter   any counter Question # 2 of 10 ( Start time: 03:40:29 PM )         Total Marks: 1 An Astable multivibrator is known as a(n)   _____   Select correct option: Oscillator   Booster   One-shot   Dual-shot Question # 3 of 10 ( Start time: 03:40:29 PM )         Total Marks: 1 The glitches due to "Race Condition" can be avoided by using a   _________   Select correct option: Gated flip-flops Pulse triggered flip-flops Positive-Edge triggered flip-flops Negative-Edge triggered flip-flops Question # 4 of 10 ( Start time: 03:40:29 PM )         Total Marks: 1 A decade counter is   ________   Select correct option: Mod-3 counter   Mod-5 counter   Mod-8 counter   Mod-10 counter Question # 5 of 10 ( Start time: 03:40:29 PM )         Total Marks: 1 The term

by + Ƒคнєєм §คQǐβ"Ҿ on December 20, 2013 at 10:13am total question 27 MCQz 22 3 questions of 3 marks 2 questions of 5 marks MCQz was bit confusing disqualifications of an auditor ?section 253 if you hired by a government bank as an auditor what you do for permot bank's credibility? what is audit process and what is its importance? audit risk assessments

by twinkle on December 21, 2013 at 3:11pm my today s paper  total 27 questions 21 MSQs most of MCq are in numeric form difference between annuity and perpetuity  >3 mark financing activity in cash slow activities >3 marks interest rate  14% annum   monthly and quarterly > 5 marks numeric question  face value of bond  and find the coupon rate > 5 marks zaida question bonds k topic se ay thay . paper easy tha . remember me in ur prayers best of luck to all <3

by wafa Ghazal (MBS 2nd Semester) on December 20, 2013 at 3:08pm my paper  mcqs zayada ter numeric forms main thy or mostly hamary quizes main se 2 long question cupon k thy or 1 long earning per share ka question tha bas itna hi yaaad hai