Question # 1 of 10 ( Start time: 09:42:34 PM ) Total
Marks: 1
When an eight bit serial in/serial out shift register is used for a 24 micro seconds time delay, the clock frequenct must be
Select correct option:
41.67 KHz
333 KHz Not Confirm
125 KHz
8 MHz
Question # 2 of 10 ( Start time: 09:43:24 PM ) Total Marks: 1
A 4-bit binary up/down counter is in the binary state of zero. The next state in the DOWN mode is:
Select correct option:
0001
1000
1110
1111
Question # 3 of 10 ( Start time: 09:43:53 PM ) Total Marks: 1
In moore machine the output depends on
Select correct option:
the current state and the output of previous flip flop
only inputs
the current state
the current state and inputs
Question # 4 of 10 ( Start time: 09:44:05 PM ) Total Marks: 1
In designing any counter the transition from a current state to the next sate is determined by
Select correct option:
Current state and inputs
Only inputs
Only current state
current state and outputs
Question # 5 of 10 ( Start time: 09:44:33 PM ) Total Marks: 1
A divide-by-10 Johnson counter requires
Select correct option:
ten flip-flops
four flip-flops
five flip-flops
twelve flip-flops
Question # 6 of 10 ( Start time: 09:44:46 PM ) Total Marks: 1
Number of states in an 8-bit Johnson counter sequence are:
Select correct option:
8
12
14
16
Question # 7 of 10 ( Start time: 09:45:20 PM ) Total Marks: 1
In a 4-bit binary counter, the next state after the terminal count in the DOWN mode is ____________
Select correct option:
0000
1111
0001
10000
Question # 8 of 10 ( Start time: 09:45:44 PM ) Total Marks: 1
Divide-by-32 counter can be acheived by using
Select correct option:
Flip-Flop and DIV 10
Flip-Flop and DIV 16
Flip-Flop and DIV 32
DIV 16 and DIV 32
Question # 9 of 10 ( Start time: 09:46:53 PM ) Total Marks: 1
A 4-bit binary up/down counter is in the binary state of zero. The next state in the UP mode is
Select correct option:
0001
1000
1110
1111
Question # 10 of 10 ( Start time: 09:47:16 PM ) Total Marks: 1
Three cascaded modulus-10 counters have an overall modulus of
Select correct option:
30
100
1000
10000
When an eight bit serial in/serial out shift register is used for a 24 micro seconds time delay, the clock frequenct must be
Select correct option:
41.67 KHz
333 KHz Not Confirm
125 KHz
8 MHz
Question # 2 of 10 ( Start time: 09:43:24 PM ) Total Marks: 1
A 4-bit binary up/down counter is in the binary state of zero. The next state in the DOWN mode is:
Select correct option:
0001
1000
1110
1111
Question # 3 of 10 ( Start time: 09:43:53 PM ) Total Marks: 1
In moore machine the output depends on
Select correct option:
the current state and the output of previous flip flop
only inputs
the current state
the current state and inputs
Question # 4 of 10 ( Start time: 09:44:05 PM ) Total Marks: 1
In designing any counter the transition from a current state to the next sate is determined by
Select correct option:
Current state and inputs
Only inputs
Only current state
current state and outputs
Question # 5 of 10 ( Start time: 09:44:33 PM ) Total Marks: 1
A divide-by-10 Johnson counter requires
Select correct option:
ten flip-flops
four flip-flops
five flip-flops
twelve flip-flops
Question # 6 of 10 ( Start time: 09:44:46 PM ) Total Marks: 1
Number of states in an 8-bit Johnson counter sequence are:
Select correct option:
8
12
14
16
Question # 7 of 10 ( Start time: 09:45:20 PM ) Total Marks: 1
In a 4-bit binary counter, the next state after the terminal count in the DOWN mode is ____________
Select correct option:
0000
1111
0001
10000
Question # 8 of 10 ( Start time: 09:45:44 PM ) Total Marks: 1
Divide-by-32 counter can be acheived by using
Select correct option:
Flip-Flop and DIV 10
Flip-Flop and DIV 16
Flip-Flop and DIV 32
DIV 16 and DIV 32
Question # 9 of 10 ( Start time: 09:46:53 PM ) Total Marks: 1
A 4-bit binary up/down counter is in the binary state of zero. The next state in the UP mode is
Select correct option:
0001
1000
1110
1111
Question # 10 of 10 ( Start time: 09:47:16 PM ) Total Marks: 1
Three cascaded modulus-10 counters have an overall modulus of
Select correct option:
30
100
1000
10000
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