Dear Friends Asslam-O-Alaikum
My Today's paper .....
10% MCQ'S from Moaaz file . &
Subjective..
2) Difference b/w SRAM & DRAM (3 marks)
Sol: [lec#39]
3) Two J.K flip flop are given … connect input termianl of the flip flop 2 bit synchronous. (3 marks)
4) Write two problems related timing of clock signal in flip flop.(2 marks)
Sol: (clock skew and race condition… (lec26)
5) 2 bit Synchoronous k incomplte circuit ko complete krna tha. (2 marks) [lec 27}
6) How many bytes will be there in 16 k *8 memory? (2 marks)
Sol:16K bytes or 16*1024 =16384 bytes
7) PIN 22 Istype ‘reg’; Define krna tha mtlb declaration byaan krne the. (2 marks)
Sol ; [lec#35]
8) Draw a complete test vactor table for 3-bit up/down counter (5 marks)
9) Draw a circuit Diagram of Binary –weighted into digital to analog Convert. (5marks)
Sol : [lec#45]
10) State Reducation process ……. Table was given (5 marks) .
Sol: [lec#32, table 32.9 a,b,c,d,e,f,g,h]
Two state assignments are given in the table below. Identify which state assignme
My Today's paper .....
10% MCQ'S from Moaaz file . &
Subjective..
2) Difference b/w SRAM & DRAM (3 marks)
Sol: [lec#39]
3) Two J.K flip flop are given … connect input termianl of the flip flop 2 bit synchronous. (3 marks)
4) Write two problems related timing of clock signal in flip flop.(2 marks)
Sol: (clock skew and race condition… (lec26)
5) 2 bit Synchoronous k incomplte circuit ko complete krna tha. (2 marks) [lec 27}
6) How many bytes will be there in 16 k *8 memory? (2 marks)
Sol:16K bytes or 16*1024 =16384 bytes
7) PIN 22 Istype ‘reg’; Define krna tha mtlb declaration byaan krne the. (2 marks)
Sol ; [lec#35]
8) Draw a complete test vactor table for 3-bit up/down counter (5 marks)
9) Draw a circuit Diagram of Binary –weighted into digital to analog Convert. (5marks)
Sol : [lec#45]
10) State Reducation process ……. Table was given (5 marks) .
Sol: [lec#32, table 32.9 a,b,c,d,e,f,g,h]
Two state assignments are given in the table below. Identify which state assignme
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