Q from the given truth table detemine SOP
Q Draw circuit diagram of FLIP-FLOP based static memory cell
Q Write down three characteristics of serial in/serial out 4-bit left shift register
Q Draw circuit diagram of R/2R Ladder D/A converter/
Q Why memory is divided into row column grid ? and why large memory slows down access time?
Q from graph need to show which error was in output answer was a missing code error?
Q draw next state table for a 3-bit up counter?
prepare the last semester's march papers mostly paper is from these paperz....
Q.Write down three characteristics of serial in/serial out 4-bit left shift register
ReplyDeleteAns:Serial-in, serial-out shift registers delay data by one clock time for each stage. They will store a bit of data for each register. A serial-in, serial-out shift register may be one to 64 bits in length, longer if registers or packages are cascaded.
Q Draw circuit diagram of R/2R Ladder D/A converter.
DeleteAns: see page#458
Q Why memory is divided into row column grid ? and why large memory slows down access time?
Row and column splits the input address into a row address and a column address and activate a row and column select lines respectively.