CS604 Current Final Term Fall 2013 Shared by Sana Rajpoot File 4

My CS604 Todays Paper 4/3/2014

Only few Mcqs were from moaz file and few were from the attached file others were new!

Q#1  Hold and Wait    2 Marks

Q#2  Do you agree using Pre-paging help to prevent thrashing?     2 Marks

Q#3  Why do we say Scan algorithm, the elevator algorithm?       2 Marks

The Scan algorithm is sometimes called the elevator algorithm, since the disk arm behaves like an elevator in a building servicing all the requests (people at floors), going up and then reversing to service the requests going down.

Q#4  What is the major purpose of Safety algorithm in Banker’s algorithm?       2 Marks

Q#5  “Virtual memory is extremely large main memory” do you agree or not? 3Marks

Virtual Memory is the separation of user logical memory from physical memory.

This separation allows an extremely large virtual memory to be provided for programmers when only a smaller physical memory is available. Virtual memory makes the task of programming easier because the programmer need not worry about the amount of physical memory, or about what code can be placed in overlays; he/she can concentrate instead on the problem to be programmed.

Q#6 Calculate physical address for each case:                    3 Marks

1.      1.     Base Register=15004

2.      2.     Logical address=456

1.      1.     IP=1A024

2.      2.     CS=40CA1

Q#7  Perform semaphore using P0 and P1 for starvation.   3Marks

Ans:

Q#9  There are two processes and three individual resources. Each process needs a two resources must. Is there deadlock possibility. Explain with reasons. 5 Marks

Q#10  In primary and secondary storage which memory you think is best when to store a program written in C language and which memory is best to store when we want to execute that program. 5 Marks

Q#11  When due to page fault CPU utilization and other IO devices utilization is and disk utilization increase. Which process may cause this condition and how is responsible to overcome this situation?    5 Marks

Q#12  In address spaces of 32-bit and above machines, you are required to identify and briefly explain two paging techniques that can reduce the size of page table in large logical address space.    5 marks

In the 32-bit machine we need to partition p into two parts, p1 and

p2. p1 is used to index the outer page table and p2 to index the inner page table. Thus the

logical address is divided into a page number consisting of 20 bits and a page offset of 12 bits. Since we page the page table, the page number is further divided into a 10-bit page number, and a 10-bit page offset. This is known as two-level paging.